Galvanic isolation (GI) integrated circuit (IC) systems enable signals and power to cross an isolation bridge that allows different IC's to operate at different floating voltages. A transformer isolator may be used as central to this type of device. To relay power over a GI bridge, a transformer is switched with transistors driving its primary turns. Secondly, a rectifier is connected to the secondary transformer turns. This is a well known isolating switched power supply topology.
FIG. 1 shows a multi-die galvanic isolation design 100 that utilizes a transformer 102 that is formed on a single silicon substrate 104 to create galvanic isolation between a first integrated circuit 106 formed on a first silicon die 108 and a second integrated circuit formed on a second silicon die 112. FIG. 1 shows the transformer 102 connected between the first integrated circuit 106 and the second integrated circuit 110 by wire bonds 114 that electrically connect the first silicon die 108 and the second silicon die 112 to the transformer substrate 104. The dielectric 116 (shown schematically in FIG. 1) formed between the windings of the transformer 102 must be thick enough to hold off the voltage difference between the first integrated circuit 106 and the second integrated circuit 110.
Above-cited related application Ser. No. 12/827,316, discloses embodiments of an integrated circuit system that comprises a first integrated circuit die having a first integrated circuit formed thereon, a second integrated circuit die having a second integrated circuit formed thereon, and a transformer that is formed on a dielectric substrate (e.g., quartz or glass) and that is electrically connected between the first integrate circuit and the second integrated circuit to provide galvanic isolation therebetween.
FIG. 2 shows one such embodiment in which an integrated circuit system 200 includes a transformer 202 formed on a dielectric substrate 204 and connected between a first integrated circuit 206 formed on a first semiconductor (e.g., silicon) die 208 and a second integrated circuit 210 formed on a second semiconductor (e.g., silicon) die 212. In the FIG. 2 embodiment, both the first semiconductor die 208 and the second semiconductor die 212 are also formed on the dielectric substrate 204. As disclosed in application Ser. No. 12/827,316, the dielectric substrate 204 may include, but is not limited to, a quartz wafer or any insulating wafer such as a glass wafer or a version thereof (e.g., pyrex, soda-lime, borosilicate glass or aluminaborosilicate glass). The first integrated circuit 206 has a first voltage, e.g., greater than or equal to 5 kV, associated therewith and the second integrated circuit 210 has a second voltage associated therewith that is less than the first voltage. FIG. 2 shows wire bonds 214 that electrically connect the transformer 202 between the first integrated circuit 206 and the second integrated circuit 210.